1. Field of the Invention
The present invention generally relates to a device information writing circuit, and more specifically, to a technology of performing a repair operation and a device information writing operation with a redundancy fuse set, thereby reducing the number of fuse sets.
2. Description of the Prior Art
In general, a fuse circuit has been widely used for analysis and repair during memory design. Additionally, a memory requires much more fuse options as the memory becomes more integrated.
FIG. 1 is a diagram of a conventional redundancy information output circuit.
The conventional redundancy information output circuit comprises a row address comparison unit 1, a column address comparison unit 2, a row/column repair information control unit 3 and a data output unit 4.
The row address comparison unit 1 compares an inputted row address with an row address of a defective cell to be repaired, and outputs a repair acknowledgement signal HITBI including repair information of the row address resulting from the comparison result.
The column address comparison unit 2 compares an inputted column address with an column of defective cell address to be repaired, and outputs repair information of the column address.
The row/column repair information control unit 3 synthesizes repair information of row/column address applied from the row address comparison unit 1 and the column address comparison unit 2, and outputs the synthesized information to the data output unit 4.
The data output unit 4 controls whether repair information of the input address to a DQ pin is outputted in response to a test mode signal TRC for acknowledging the repaired address. Here, the data output unit 4 compares output signals from an address fuse set, and outputs high data to the DQ pin when all addresses are identical.
Accordingly, the conventional redundancy fuse set circuit selectively outputs the repaired address information by controlling the test mode signal TRC depending on the address comparison result when an enable fuse is cut. When device information is written in the conventional redundancy fuse set circuit with additional repair fuse sets, the same data are used in each bank to identify whether the inputted address is a repair address or a device information writing address. As a result, four fuse sets are required on a basis of four banks to store one data.
In this case, the LOT number, which represent the number of wafers under the same process condition, and 16 fuse sets are required in at least four banks to write the wafer number and row/column information.